[Fpga-synth] Starting points?

[Byron G. Jacquot]

Gentlemen,

Thank you for all of the insight and comments.

I studied Verilog and was deep into state machine design and simulation while I was in school.  I understand synchronous logic, busses, caches, piplining, etc.  I pulled out my old Verilog text and I'm starting to review it again.  I'm also a well-disciplined C coder, understanding the importance of legible code, and modular design.

Since I've got an audience with some experienced folks here, I'm going to start with the Spartan 3E kit.  Is Avnet part number HW-SPAR3E-SK-UNI-G the one everyone here is using?

As for languages, I'm going to get my feet wet with both Verilog and VHDL.  Since I have a distant background in Verilog, I expect it'll come more quickly.  However, the project I was recently working on was done in VHDL, and there's a chance I could be contracted to maintain it.  I'd love to be able to wring out the last few bugs if they being me in.  

Its also an Actel part.  Does anyone have experience with Xilinx vs. Actel?  How do the tools compare?

What's the wisdom on microprocessor cores?  I see that the picoBlaze is free, but kinda small.  By offloading stuff onto custom hardware, can it be more efficient than a general-purpose processor alone?  How do the larger variants stack up in comparison?  How does the pricing work for personal demo and evaluation work?

My father (a BASIC/Matab guy) likes to joke "a good engineer can write FORTRAN in any language."  I'm sure the HDL's are no exception.

Thanks again,

Byron Jacquot