[Fpga-synth] New project - ARM & FPGA Audio board

[Eric Brombaugh]

Magnus Danielson wrote:
> Eric Brombaugh skrev:
>> Hi List,
>>
>> I've been working on a new project with an ARM MCU and small Xilinx 
>> FPGA. Details here:
>>
>> http://members.cox.net/ebrombaugh1/synth/armfpga/index.html
>>
>> I've had a bit of input from Scott Gravenhorst and Magnus Danielson on 
>> some of the features. Hopefully this rolls up a bunch of stuff that 
>> people would like to do in FPGA synthesis.
>>
>> Let me know what you think!
> 
> I had one comments from a friend of mine which is deep into precission 
> and he made the note that the S/N ration of the A/D and D/A could be a 
> few dB better... it was not up to state of the art. I'll try to get 
> detailed feedback (will most probably be in the form of the schematic).

No doubt the CS4270 codec I'm using is not the pinnacle of audio 
performance. I haven't gone out of my way to optimize the layout for 
best analog/digital isolation either. It will be interesting to see how 
well it works.

> I think it really depends on what you expect it to be I guess.

Managing expectations is critical, and my goal here is to have something 
that sounds decent but not necessarily excellent to perfect. Someone I 
know has an Audio Precision analyzer - hopefully he'll let me hook this 
up when I build it to see what the SNR actually is. If it's not great 
then I'll see what can be done for Rev 2.

> I commented that you can always hook a better CODEC on the outside 
> anyway, when you need it. Could be good to recall.

Yes - use AES/EBU or SP/DIF to drive high-end audiophile and/or 
studio-quality equipment.

> He also asked if it could pull of real-time (back-to-back) 1 Msamples 64 
> bit FFT for a 200 kS/s rate. By a quick exambination it looks not all 
> that impossible really. The multiplier blocks needs to be combined to 
> create sufficient bit-resolution. I think it is mostly an issue about 
> coding abilities than anything else.

Real-time FFTs would be pretty nifty. I'm not sure if there are 
sufficient resources for super-high resolution transforms in the FPGA 
I've specified, but the footprint is compatible with the next size up so 
you could grow to 500kgates if necessary for only a few more $$.

BTW - an off-list discussion with someone has revealed a simple way to 
double the external SRAM. I've made some minor updates to the schematic 
& layout to reflect this and have updated the website.

Eric