[Fpga-synth] SVF Question

[Scott Gravenhorst]

Happy New Year all,

Is there a web resource which explains why a digital SVF is best operated using low cutoff frequencies?  

I've read a small piece on Chamberlain who used a figure of 1/6 SR.  Other people suggest 1/8 or even 1/16 SR as an upper Fc limit, but the explanations I've read are sort of vague saying things like "certain features aren't apparent in the digital version as are available in the analog version when the digital version is used at higher cutoffs".

-- ScottG
________________________________________________________________________
-- Scott Gravenhorst
-- FPGA MIDI Synthesizer Information: home1.gte.net/res0658s/FPGA_synth/
-- FatMan: home1.gte.net/res0658s/fatman/
-- NonFatMan: home1.gte.net/res0658s/electronics/
-- When the going gets tough, the tough use the command line.