[Fpga-synth] Modular approach

[Theo Verelst]

On Mon, 2009-01-26 at 20:27 -0800, Veronica Merryfield wrote:
> On 26-Jan-09, at 1:21 PM, Theo Verelst wrote:
> 
> > V....estionable, but then again, UNIX is already for over 35 years...
> >
> 
> Theo, it struck me that my wording may not have been too clear.
> 
> In a DSP, it is relatively easy to use one processing object multiple  
> times to create a complete system. DSPs and processors are good at  
> doing this as they are essentially sequentially machines. FPGAs are  
> not. Whislt one can shoe horn sequential operation into an FPGA like  
> you can shoe horn parallel operation into a DSP/COU system, it would  
> be better to use the FPGA in it's natural way and it is this I am  
> looking for but with the flexibility of a modular system (like the  
> Nord) that is not set at build time.
> 
> Did that come out any better?
> 
> Veronica, Port Alberni, -3C and snowing!


Veronica, 

One could trumpet that a few square cm or even inches of chip area are
whatever the designer of the computer (with DSP being a special kind),
or FPGA/ASIC or parallel machine or microprogrammable machine wants it
to be, in practice all kinds of artificial divisions are possible, I'm
sure, just like parallel compilers versus Object Oriented systems or bus
structures versus reusable ALUs under multi-threading, I guess mostly
pro designers will want a lot of usefull computations per second per
chip area.

Since this is imo more a hobby than a pro forum (which I think is good)
lets put it simple: I think it is fine to make FPGA blocks with a
singular function like a generator, a filter, a envelope generator, etc.
and simply have them connected up over some form of FPGA signal path,
and basically let those blocks run at sample speed!

Which reminds me: did anyone here experiment with DSD (DTS) DA
converters? I've got a few wonderfully spec-ed TI samples lying around
for ages already, but it's such a drag to solder yet another converter
board with them and getting the board design to get good specs...

Well, Veonica, I've made a DSP synth myself
(http://www.theover.org/Synth), I know how in quite good working
practice to make that even sound good, and I know since the beginnings
of them from the Swedish synth maker and that of course it is a great
idea to make this modular. In fact I've sort of hobbied (but honestly it
would fit in EE PhD levels, too) a way to serialize the blocks you might
want to make work on a FPGA, like here: http://wiki.tcl.tk/bwise , 
for instance by blowing in a schedule list in a ready-made fpga with 
blocks and a flexible communication network.

Unless you feel really lucky and want to change the FPGA programming in
runtime using reprogramming of parts of it, and achieve modular
programming that way. Fine too. Using sample rate as block clock-speed
does have the advantage of being able to raise the sample frequency till
in the megaherz rate or so, which combined with correctly frequency
limited (shanon!) generators and signal modifiers can make the audio
quality quite good, I'm sure.

Compared with other solutions, like a fast (multi core!) DSP, a fast
workstation, and even a fast parallel computer system like Tesla/Cuda
(http://www.theover.org/Cuda) the advantages of using FPGA's might fade
when the programming of the FPGA isn't using good speed. 

A Cuda parallel machine like on a under $100 graphics card has memory
speed and computation speeds (mips/flops) which come from a pro asic
design on a huge chip. Fine grained parallelism on well used FPGA blocks
is still attractive then, I suppose especially on top of the line
products, as I've done some computations on (I suppose as well as both
Xilinx and NVidia) but for many cases, both dsps and fpga's simply
aren't up to the competition, which is possibly fitted with a good
parallel C compiler, advanced memory management, no freaky OO programs
to do signal paths, etc.

Maybe I'll make some nice modular FPGA synth setup though, when I do
I'll keep you guys informed!


Greetings,

   Theo Verelst               (The pond is only just not froozen, and I
had to interrupt an outdoor RC model session because of rain..)