[Fpga-synth] Linear / Expo Release for ADSR Working

[Theo Verelst]

On Wed, 2009-04-08 at 11:46 -0700, Scott Gravenhorst wrote:
> "The making of synthesizers in FPGAs." wrote:
> >
> >On Mon, 2009-04-06 at 16:51 -0700, Scott Gravenhorst wrote:
> >> Have a listen:
> >> 
> >> http://home1.gte.net/res0658s/gatemanpoly_bell_lin_expo.wav
> >> 
> >> This is a sample of two strikes of a bell sound, the first uses 
...
> >I would seem fun to me to take the FPGA design and simulate the exact
> >datapath in software (probably as a realtime Jack/alsa midi program),
> >which would also be very good for assessing accuracy and even sampling
> >issues and of course to try out stuff more easily like different ADSRs.
> >It is possible I also turn my DSP synthesizers datapath into a Linux
> >program, I know that one at least sounds good (too, there are many
> >softsynths) and it's source is alread in C, except the Signal Processing
> >interrupt loop loop and IO are different.
> >
> >The blocks could be connectable over my Bwise (http://wiki.tcl.tk/Bwise)
> >but I didn't make such type of app with it yet (I have in the past
> >though).
> >
> >Kind regards
> >...

Well, I started with a signal flow graph, maybe someone (Scott ?) could
quickly fill in some facts on the wiki page I made:

 http://www.theover.org/wiki/index.php/FpgaSynth
 
Theo