[Fpga-synth] Envelope - linear attack & expo decay/release?

[Eric Brombaugh]

Theo Verelst wrote:

> And of course for any digital implementation, it´s the sampling and the 
> accuracy matters which are probably more important than a lot of other 
> considerations, like a fast attack has a spectrum which gets added to 
> the waveform spectrum (gets shifted, even if that is somehow frequency 
> limited) and when a fast exponential spectrum get multiplied with a 
> waveform (especially when filtering hasn´t been applied yet) the 
> resulting spectrum can easily be far outside the niquist band.

This seems like a somewhat academic concern to me. Fast transients are 
often desired precisely because of the extra spectral content they 
produce. The 'snap', 'chiff' or whatever you call it is part of why we 
want them. Transients, by definition are, well, transient. Any aliasing 
will be short-lived, so the question is if it's objectionable, or for 
that matter even noticeable.

> This also applies to the point where the sections of the adsr or by note 
> repetition the release going into the next attack: the discontinuity can 
> couse a major spectrum outside the half-sampling rate bandwidth and 
> therefore cause serious aliasing, and signal ambiguity for following 
> processing stages (even for the filter). Transients (e.g. coupling 
> capacitors, averaging of detuned oscillator waves) are another matter to 
> think about, and how will the digital filter algorithm respond to 
> certain peaks generated by the ADSR, without sounding the same all the 
> time (happens a lot in digital simulations which are then soon boring)...

It's hard for me to tell if you're talking about analog modeling here. 
Talk of coupling capacitors suggests that.

> Also think about the accuracy: even for a CD quality sample, your 
> envelope computations will have to be in the neighbourhood of 16 bits 
> accurate, which a repeated 18 bits multiplication on a 18 bits or less 
> state is not going to give you for small volumes. Also, the accuracy of 
> setting the timing is important, most likely when doodling obvious 
> algorithms this can be overlooked, however this accuracy can be needed 
> for tuning sounds nicely (in the pure analog domain is of course is 
> never an issue).

So it seems the central thesis here is that the current state of the art 
in FPGAs isn't sufficiently accurate for the type of synthesis you'd 
like to do?

A few thoughts:

* Seems to me that using 18x18 multipliers should work just fine for 
computing 16-bit envelope data, provided proper rounding and guard bits 
are employed. There may be some quantization in the lsbs, but for audio 
work the lsbs are > 80dB down and a small amount of inaccuracy in the 
tails probably won't kill you.

* I assume that by timing accuracy you're referring to compounding 
errors in the ADSR accumulator due to quantization of the exponentials? 
How noticeable do you believe these will be? Seems that ADSR timing to 
within 5% should be sufficient, and that should be easily achieved. 
Also, what is the standard timing to which you're comparing?

* If you're just 'doodling obvious algorithms' then the FPGA will work 
nicely. Something wrong with obvious algorithms? :)

* Perhaps the focus should shift from "these FPGA's can't do what I 
believe is required" to "what great things can I do with the FPGAs that 
I've got?" Working within the constraints of what's available is the 
essence of engineering.

All interesting points. Thanks for bringing them up!

Eric