[Fpga-synth] Nomenclature

Eric Brombaugh ebrombaugh1 at cox.net
Thu May 29 22:08:43 CEST 2008


Scott,

This is a fairly common operation in hardware DSP and I just call it 
gain adjustment. As you noted, the shift is just an amplification 
factor, so treat the whole function as a variable gain cell. 'Window' 
seems like a fine name for the output of the shift operation

One additional detail you might consider - when you truncate a 30-bit 
value down to 12 bits, you introduce quantization error and a slight DC 
bias. You can't do anything about the quantization, but by adding a 1/2 
LSB offset you can eliminate the DC bias. It looks something like this:

reg  [29:0] MyReg;
reg  [4:0]  shifts;
wire [12:0] DACwindow;
wire [12:0] Roundoff;
wire [11:0] Out;
wire [29:0] MyRegShifter;

assign MyRegShifter = MyReg << shifts;
assign DACwindow    = MyRegShifter[29:17];
assign Roundoff     = DACwindow + 1;
assign Out          = Roundoff [12:1];

In many audio situations this isn't necessary and you can save the extra 
hardware it needs, but for best fidelity rounding like this is better 
than simple truncation. Note that there are other more complex methods 
of rounding that are even more accurate (convergent or unbiased rounding).

Note that to be _really_ safe, you should make 'MyRegShifter' a few bits 
larger than the input, carry those bits through the rounding operation 
and then put a saturation operation at the very end. That way you'll 
always avoid overflow wraparound, even if you set the gain too high.

Eric

Scott Gravenhorst wrote:
> Probably a simple question -
> 
> I use something I call a "window", which is probably not the correct term and I'd like to know the correct term.
> 
> Assume there is a register MyReg of 30 bits width that contains data.  This register needs to connect to a module, such as a DAC, that inputs a smaller number of bits than 30.  For this example, assume it's a 12 bit DAC.
> 
> If one simply assigns the top 12 bits of MyReg to the DAC input, that works as long as the general magnitude of values is large enough.  But what if something attenuates the values transferred to MyReg, such as a lowpass filter, such that the output is never more than can be contained in, say, the lowest 15 bits.  Under those conditions, a better connection would be to use not the top 12 bits of MyReg, but to grab 12 bits down to the right a little.  If the system can produce both "large" and "small" signa
> ls at MyReg (under different conditions), then it would be nice to be able to adjust where the "window" is located over MyReg.  
> 
> I do this as follows:
> 
> reg  [29:0] MyReg;
> reg  [4:0]  shifts;
> wire [11:0] DACwindow;
> wire [29:0] MyRegShifter;
> 
> assign MyRegShifter = MyReg << shifts;
> assign DACwindow    = MyRegShifter[29:18];
> 
> The wire vector DACwindow is then transferred to the DAC module input register by a state machine.  'shifts' is an "amplification factor".  The way I look at this, this technique is better than simply left shifting to increase magnitude because bits with computed information are used instead of zeroes.
> 
> What is this technique called?
> 
> 
> 
> -- ScottG
> 
> -----------------------------------------------------------------
> 
> -- Scott Gravenhorst
> -- GateManPoly - FPGA Based Polyphonic MIDI LA/FM Synthesizer
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