[Fpga-synth] ISE 10.1

[Dave Manley]

I'm seeing performance improvements on one design from 189 -> 199 MHz 
running under 9.2.03 ->10.1 SP1 . There's a much larger design running 
this weekend I'll see how it did tomorrow.

A couple of MAP options that look interesting -x (using this pushed the 
clock to 216 MHz on the design mentioned above) and -lc auto.

Our FAE claimed SmartGuide was much improved.  I haven't tried it yet.

-Dave
> I tried 10.1 (initial release w/o service pack 1) about a month ago  
> and found some issues with PAR on a very large design. I summarized my  
> experiences on comp.arch.fpga here:
>
> http://groups.google.com/group/comp.arch.fpga/msg/d33d158611bf1d4d
>
> and got some interesting feedback. My feeling at the time was that it  
> has to 'age and mellow' a bit before I trust it with my paid work. I'm  
> not doing anything at the moment that demands the new features of  
> 10.1, so that's not a problem for me.
>
> I've got a buddy who tried 10.1 SP1 earlier this week and had some  
> issues with core generator that were resolved by dropping back to 9.2
>
> I guess my recommendation would be to proceed with caution.
>
> Eric
>
>