[Fpga-synth] ISE .syr Question

[Eric Brombaugh]

Scott Gravenhorst wrote:
> I think I know the answer, but I need to ask...  I'm working on a project
> that uses one shared dedicated multiplier.  Looking at the .syr file, I see
> this:
> 
> Synthesizing (advanced) Unit <phLUTe>.
>         Found pipelined multiplier on signal <P>:
>                 - 1 pipeline level(s) found in a register on signal <A>.
>                 Pushing register(s) into the multiplier macro.
> 
>                 - 1 pipeline level(s) found in a register on signal <B>.
>                 Pushing register(s) into the multiplier macro.
> 
> Does this mean that the design will use the registers that are associated
> with the dedicated multipliers and not slice flipflops?

Yes, and it's worth taking advantage of that wherever you can just to 
free up registers in the slices.

Eric