[Fpga-synth] Stereo Audio Interface update

malik martin laserbeak43 at gmail.com
Thu Aug 28 10:28:16 CEST 2008


didn't even see this. cool

On Wed, Aug 27, 2008 at 1:57 AM, Eric Brombaugh <ebrombaugh1 at cox.net> wrote:

> The I2S DAC is working with the Avnet EVK board. I've put the initial test
> code up on the website:
>
> http://members.cox.net/ebrombaugh1/synth/audiodac/i2s_tst.zip
>
> This is a Verilog ISE 9.2 project that uses the capsense pads to raise &
> lower the pitch and gate the tone on/off. Make a slide whistle or morse key!
> This test runs the DAC at 24-bits & 41.7kHz, but I'll be updating the core
> logic to run faster in the near future.
>
> Eric
>
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