[Fpga-synth] phLUTe
Eric Brombaugh
ebrombaugh at earthlink.net
Tue Apr 1 02:48:15 CEST 2008
Scott Gravenhorst wrote:
> And the LaGrange interpolator I used is actually just a linear interpolator.
Yes - that's easy to see once I read through some of the paper. The
structure computes the delta between the previous and current samples,
then scales that by the time offset (where 1.0 = sample period) and
subtracts the result from the current sample. Bingo: linear interpolation.
> Ah, yes, I saw the higher order one, they're required when the signal frequency is a bigger
> proportion of the sample rate. My sample rate vs my signal frequency was compatible with the
> performance of the much simpler 1st order interpolator, the sample rate is 100KHz and the
> application stays at 5KHz or below.
That's correct. Lower interpolation orders have higher error when the
bandwidth approaches Nyquist. It's nice to have logic that runs so fast
you can cut those corners. Even 100kHz is pretty slow by FPGA standards
though. If you had enough memory on-chip you could multiplex that one
circuit between a lot of voices.
Memory seems to be a stumbling block for a lot of things. Did you ever
figure out how to get the DRAM interface to go? It's really sad the
Xilinx/Digilent put that 133MHz SDRAM on the S3Esk - the frequency
doesn't really match up well with the clock oscillator that's provided.
Someday I'd like to try out the demo Rick Huang did about 1.5 years ago:
http://member.newsguy.com/~rhuang/FPGA/WideBus-Recorder.zip
He says he got it working.
Eric
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