[Fpga-synth] Interesting
Eric Brombaugh
ebrombaugh at earthlink.net
Mon Nov 19 02:58:17 CET 2007
Heed the words of the master!
Thanks for the advice - I don't usually spend much time worrying about
jitter, but this is helpful. I'll take the suggestions of a guy with
atomic clocks as gospel.
I've used DCMs several times and one thing I might suggest: If the
reference clock is ever stopped they tend to go out into the weeds.
It's helpful to have the reset input brought out to a controllable
point to correct this.
Eric
On Nov 18, 2007, at 6:21 PM, Magnus Danielson wrote:
>
> A few words of advice:
>
> 1) Do not stare yourself totally to death on Peak-to-Peak jitter
> values. Those
> numbers have a high degree of bogusity about them. The reason is
> that the
> noise part of jitter is following Gaussian law, so if you wait
> long enought
> the peak-to-peak values will increase. Gaussian jitter can not be
> measured
> by peak-to-peak, but you want to measure it in terms of RMS. The
> peak-to-peak is a probability function and the rule-of-thumb value
> of 14
> times the RMS value gives you 1.0E-12 in BER.
>
> 2) Don't fool yourself to beleive all jitter is thermal, i.e. having
> gaussian
> distribution. The total time-error (or peak-to-peak) jitter sum
> (you can
> calculate it this way for BER/window-size values) will be the
> random jitter
> plus the deterministic jitter. Deterministic jitter includes stuff
> like
> Inter-Symbol-Interference (i.e. amplitude skew due to memory
> function of the
> channel, which adds level to the signal such that propper timing
> can not be
> acheived) and fixed frequency modulations. The later kind will eat
> you for
> breakfast if you don't pay attention. Not all crystal oscillators
> have low
> jitter. You will find that plenty of them for higher frequencies
> actually
> uses a lower frequency crystal and then uses a DCM or PLL to get
> the higher
> frequency. Not very supprising will there be a modulation at the
> comparator
> frequency, and yes, I have tossed such oscillators out of our
> designs many
> times. There are those that will properly filter in the step-up.
> Infact,
> some of these cheap oscillators perform better for some
> frequencies. You can
> however never know until you have measured it at the intended
> frequency.
>
> 3) Messen is wissen.
>
> Higher speeds do require fancier tools. I have pretty fancy tools.
> Infact,
> for clock measurement I have fancier tools at home than at work.
> Maybe that
> is why they sometimes have me measuring things at home from work.
>
> 4) Don't forget the step-up relation. The time-jitter you have at
> the reference
> may remain the same for some setups, so the reference jitter needs
> to meet
> the end jitter requirement in time, even if the cycle period is
> much bigger.
> The relative jitter thus changes as the carrier frequency is
> stepped up.
>
> 5) Read up on jitter. The Fibre Channel Jitter Mesurement Methology
> document is
> a good read. Tektronix has a nice document too. While these are more
> transmission oriented, they are more advanced in analysis than
> many of the
> digital and FPGA papers are.
>
> 6) Don't forget normal signal integrity. The Handbook of black
> magic, and the
> followup on Advanced black magic should be a good read too. The
> world is a
> harsh analog world for the poor digital engineers to figure out
> why their
> 0s and 1s isn't commming through properly.
>
> Cheers,
> Magnus
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